1. Field of the Invention
The present invention relates generally to logic circuits for shifting a floating point, particularly to a logic circuit for generating a shift control signal making use of the absolute value of a difference between exponents for shifting the mantissa in floating-point addition or subtraction.
2. Description of the Prior Art
V. Carl Hamacher et al describe in "Computer Organization," McGraw-Hill, 1978, p. 219, a floating-point arithmetic circuit such as shown in FIG. 5. It has a shift control signal generator 1 for generating a shift control signal making use of the difference between exponents. When fed with the Exponent data a and b (binary numbers) of floating-point data, a subtracter 2 outputs the absolute value d of a difference a-b and a carry signal c. When fed with the mantissa data e and f, a selector 3 feeds a right shifter 4 with the mantissa e or f of the Exponent data a or b whichever smaller in response to the carry signal c and an adder subtracter 5 with the mantissa of the larger exponent. The right shifter 4 receives the mantissa data e or f selected by the selctor 3 and controls the amount of shift in response to the absolute value d. The adder subtracter 5 receives the output from the shifter 4 and the mantissa data e or f selected by the selector 3 and performs an arithmetic operation for these data.
In FIG. 6, a decoder 6 receives the absolute value d of a difference (a-b) and generates a control signal for shifting the mantissa. The same or equivalent parts are given the same reference numerals as those of FIG. 5.
A floating-point addition or subtraction of two data is generally made with their exponents aligned to the larger one so that it is necessary to make a difference of the two exponents to shift the mantissa with the smaller exponent until the location of its radix point matches that of the larger one. This operation is generally called "shifting." In order to provide a control signal for this shift, it is necessary to obtain the absolute value of a difference of the exponents.
In FIG. 5, exponent data a and b are fed to the subtracter 2 where the data b is subtracted from the data a. If the value of data a is larger than that of the data b, the carry signal c is at a low logic level "L" while when the value of the data b is larger than that of the data a, the carry signal c is at a high logic level "H". In other words, when the carry signal c is at "L", the subtraction result is positive while when the carry signal c is at "H", the result is negative. Although it is not shown in FIG. 5, there is a circuit for performing a twos complement operation when the result is negative thereby to output the absolute value d even if the carry signal c is at "H". The twos complement operation is to invert data and add unity thereto. When the result is positive, the absolute value d is output as it is. This absolute value d is fed to the right shifter 4 for shifting the mantissa by that much.
When the carry signal c is at "H", the mantissa data e is fed to the shifter 4 while when the carry signal c is at "L", the matissa data f is fed to the shifter 4. The shifter 4 performs a shifting operation according to the amount of shift indicated by the absolute value d. Upon completion of the shifting operation, the data are fed to the adder subtracter 5 for processing.
When the shift quantity expressed in binary notation is used as a control signal as it is, it is necessary to make several shifts; i.e., bit 1 shift if the lowest order bit 1 is "1", bit 2 shift if the next bit 2 is "1", bit 4 shift if the next bit 4 is "1", and bit 8 shift if the next bit 8 is "1". For this reason, there is a barrel shifter for decoding the shift quantity to provide a control signal having only one "1" for shifting a given number of bits.
FIG. 6 shows a shift control signal generation circuit for this purpose. The absolute value d of a difference of exponents (a-b) is fed to the decoder 6 to provide a shift control signal g, which is fed to a barrel shifter for effecting shift.
The conventional floating-point adder subtracter thus constructed must take twos complements to provide the absolute value when the subtraction result of exponents is negative. Consequently, an addtional process is required for inverting data and adding unity. In other words, an addition must be made to the subtraction result, causing a delay in carry propagation and the recognition of a shift control signal.